// right-hand part of the field.
fn field_specification(&self, l: usize, r: usize) -> Word {
let mut sign = false;
+ let mut l_clamp = l;
if l == 0 {
sign = self.sign;
+ } else {
+ l_clamp = l - 1;
}
let r_clamp = r % 5;
let mut bytes = [MixBit::default(); 5];
- for n in l..r_clamp {
+ for n in l_clamp..r_clamp {
bytes[n] = self.bytes[n];
}
Word { sign, bytes }
}
+
+ fn address(&self) -> i16 {
+ let magnitude = ((self.bytes[0].value() as i16) << 6) | self.bytes[1].value() as i16;
+ match self.sign {
+ true => magnitude,
+ false => -magnitude,
+ }
+ }
}
// There are nine registers in MIX.
fn main() {
let fs = (Word {
sign: true,
- bytes: [MixBit { v: 255 }; 5],
+ bytes: [MixBit { v: 63 }; 5],
})
- .field_specification(0, 2);
- println!("{:?}", address(fs.bytes[0], fs.bytes[1]));
+ .field_specification(1, 2);
+ println!("{:?}", fs.address());
}